ARM64: zynqmp: Use 64bit size cell format for memory node

Enable option to support more then 4GB memories in single size block.

Signed-off-by: Michal Simek <[email protected]>

diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts
index 1928b0bca002ecb416112aa1f00fae16908829f4..7fa0694fcd98064ab5d03944fdf6980f2c8ee10d 100644 (file)
--- a/arch/arm/dts/zynqmp-ep108.dts
+++ b/arch/arm/dts/zynqmp-ep108.dts
@@ -33,7 +33,7 @@
 
        memory {
                device_type = "memory";
-               reg = <0x0 0x0 0x40000000>;
+               reg = <0x0 0x0 0x0 0x40000000>;
        };
 };
 

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 8413f16ee374278bc5cc0b1c02532672e84830f0..fb95b4828b90a7b0cf2fddbf55306f836a49fee6 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -10,7 +10,7 @@
 / {
        compatible = "xlnx,zynqmp";
        #address-cells = <2>;
-       #size-cells = <1>;
+       #size-cells = <2>;
 
        cpus {
                #address-cells = <1>;
@@ -247,7 +247,7 @@
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <1>;
-               ranges;
+               ranges = <0 0 0 0 0xffffffff>;
 
                gic: interrupt-controller@f9010000 {
                        compatible = "arm,gic-400", "arm,cortex-a15-gic";
@@ -266,7 +266,7 @@
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <1>;
-               ranges;
+               ranges = <0 0 0 0 0xffffffff>;
 
                can0: can@ff060000 {
                        compatible = "xlnx,zynq-can-1.0";